Writing to an I2C Based EEPROM
The 24LC32AT is a 32KBit EEPROM that is accessed via the I2C bus. If we look at page 7 of the EEPROM data sheet, we are given information about how to write to a specific address in the EEPROM.
Source: 24LC32AT Data sheet
The control byte for the 24LC32AT requires us to specify a 7-bit address of 0x50 ( the 24LC32AT has no external chip select bits, so we set them to zero). The next two bytes contain the address being written to The last byte of data sent is the data being written.
The screen capture below illustrates writing 0x01 to address 0x0001. The addresses shown below are in 7-bit format.
Reading from an I2C Based EEPROM
If we look at page 10 of the 24LC32AT data sheet, we are given information about how to read an address in the EEPROM.
Source: 24LC32AT Data sheet
A read operation actually starts with a write. The internal EEPROM address is set by writing the control byte followed by two bytes of address. After the 2nd address byte has been transmitted, the master device sends a restart condition.
A restart condition occurs when the master sends a second start command prior to sending the stop condition. The restart condition re-sends a control byte where the 8th bit a a 1 (indicating a read operation). The slave will then drive the data on SDA for the next 8 clock cycles. The read operation is terminated when the master device does not ACK the data.
The following screen capture demonstrates reading from address 0x0001.
Taking a closer look at the restart, we see that the SDA is pulled low while SCL is high, indicating a second start condition
The transaction terminates when the master device fails to ACK the last byte. The master terminates the transaction by generating a stop condition. The stop condition requires that the SDA line makes a low-to-high transition while SCL is high. To do this, the master drives SDA to 0 and then releases SDA.
